1. Field of the Invention
The present invention relates to an improved microelectronic assembly and packaging method. In particular, the improved microelectronic assembly includes a device package for housing a semiconductor die or chip, an array of passive electronic components operating in cooperation with the semiconductor die and housed inside the device package, and a diamond heat spreader in contact with the semiconductor die to improve the flow of heat.
2. Description of the Related Art
Electronics systems assembled on a circuit substrate, e.g. a printed circuit board, (PCB), or the like, generally include one or more microelectronic assemblies and a plurality of passive electronic components surface mounted onto the PCB. The microelectronic assemblies and passive components are electrically interconnected by “PCB interconnections” comprising a series of conductive pathways such as conductive planes or conductive runs or buses on various layers of the PCB and interconnected by via holes, and the like. Typically, each microelectronic assembly includes one or more integrated circuits, (IC's), formed on a semiconductor die or chip and a device package comprising a housing or enclosure surrounding the chip to mechanically support the chip and protect the chip from damaging mechanical and electrical shock, contaminates and moisture. In addition, the device package may block damaging electromagnetic radiation transmission and facilitate thermal energy dissipation. Moreover, the device package includes “package interconnections” comprising a series of conductive elements forming conductive pathways that extend from the semiconductor chip to the PCB for electrically interconnecting the IC's with the electrical system.
In many electrical systems, passive components are incorporated into the system to correct unavoidable shortcomings of system performance. In particular, passive components such as resistors, capacitors and inductors filter signal noise, damp circuit resonances and stabilize signal frequencies. An important example of such a correction is a decoupling circuit. Decoupling circuits are typically used in association with high frequency digital logic and mixed signal circuits such as computer mother boards, digital cameras, and other digital imaging systems.
Typically, the decoupling circuit comprises one or more capacitors electrically interconnected between a power distribution system or power supply and an IC, such as an analog to digital converter (ADC), housed inside a microelectronic assembly. Digital circuits have high power demands synchronized with clock pulses and a low power demand between clock transitions. This occurs because clock pulses initiate millions of logic steps all drawing power simultaneously. The decoupling capacitors store charge between clock pulses and deliver the charge when the clock pulse occurs. This decouples power supply switching noise and other transients from IC signals and maintains a substantially uniform input supply voltage.
As input signal and IC clock frequencies increase, the number of decoupling capacitors needed to decouple power supply transients also increases to the point that high frequency mixed signal IC's may require as many as 50 decoupling capacitors taking up valuable space on the PCB. Generally, there is a need in the industry to reduce the number of passive components on PCB's and especially on space limited PCB's used in small devices such as a hand held device, e.g. cell phones, and other consumer electronic products.
Another problem associated with the use of capacitors on PCB's is that capacitors interact with the parasitic or self inductance and resistance inherent in the conductive pathways electrically interconnecting the capacitors with the IC's. The parasitic inductance and resistance when combined with the capacitance of the decoupling capacitors act like an R-L-C network having resonant frequencies and harmonics capable of injecting additional noise into IC input signals and possibly capable of damaging the IC and/or adversely affect circuit performance. In particular, “PCB interconnections” and “package interconnections” have “self inductance” or “parasitic inductance” that interacts with decoupling capacitors to form an R-L-C network. Moreover, the magnitude of the reactance (i.e., the impedance due to the parasitic inductance) is proportional to the input signal frequency with the reactance increasing with increasing input signal frequency. In particular, it is known that special decoupling circuits for IC's operating with input signals having a frequency above 50 MHz require multiple fast acting decoupling capacitors operating in parallel in order to keep up with charge demands. Recently, as input signal frequencies begin to exceed 1 GHz, the interaction of decoupling capacitors with the parasitic inductance of PCB and package interconnections have become problematic as the R-L-C networks formed by decoupling capacitors on a PCB and package interconnections generate unacceptable signal noise.
Conventional packages are unacceptable for packaging new high speed, high dynamic range (i.e., high signal to noise ratio), high power dissipation, mixed signal die because there are no conventional packages which simultaneously address all 3 of the following requirements: 1) maintain sufficiently low junction temperatures for the high power densities and high overall power dissipation of the new die, 2) contain sufficiently low parasitics in the interconnects within the IC package to achieve a low noise environment and high dynamic range operation in the presence of high speed switching and mixed analog/digital circuitry; and 3) contain adequately short path lengths between the die and critical passive components (such as decoupling capacitors) to minimize parasitics for proper operation of the high speed, high dynamic range circuit.